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Silicon Labs /ZGM230SA27HNN /CMU_NS /PCNT0CLKCTRL

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Interpret as PCNT0CLKCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)CLKSEL

CLKSEL=DISABLED

Description

No Description

Fields

CLKSEL

Clock Select

0 (DISABLED): PCNT0 is not clocked

1 (EM23GRPACLK): EM23GRPACLK is clocking PCNT0

2 (PCNTS0): External pin PCNT_S0 is clocking PCNT0

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data